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ControlPULP: A RISC-V On-Chip Parallel Power Controller for Many-Core HPC Processors with FPGA-Based Hardware-In-The-Loop Power and Thermal Emulation

ControlPULP: A RISC-V On-Chip Parallel Power Controller for Many-Core HPC Processors with FPGA-Based Hardware-In-The-Loop Power and Thermal Emulation

TYPE OF PUBLICATION

Article in journal

AUTHORS

Ottaviano, A., Balas, R., Bambini, G. et al

PUBLISHER

Springer

YEAR OF PUBLICATION

2024

PLACE OF PUBLICATION

Switzerlad

ISSN

1573-7640

DOI

https://doi.org/10.1007/s10766-024-00761-4

CITACION

Ottaviano, A., Balas, R., Bambini, G. et al. ControlPULP: A RISC-V On-Chip Parallel Power Controller for Many-Core HPC Processors with FPGA-Based Hardware-In-The-Loop Power and Thermal Emulation. Int J Parallel Prog 52, 93–123 (2024). https://doi.org/10.1007/s10766-024-00761-4

LINK TO THE REPOSITORY

https://www.research-collection.ethz.ch/handle/20.500.11850/663701?show=full

LINK TO THE PUBLICATION

https://link.springer.com/article/10.1007/s10766-024-00761-4