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Scalable Hierarchical Instruction Cache for Ultralow-Power Processors Clusters

Scalable Hierarchical Instruction Cache for Ultralow-Power Processors Clusters

TYPE OF PUBLICATION

Article in journal

AUTHORS

Jie Chen, Igor Loi, Eric Flamand; Giuseppe Tagliavini; Luca Benini, Davide Rossi

PUBLISHER

IEEE

YEAR OF PUBLICATION

2023

PLACE OF PUBLICATION

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

ISSN

DOI

https://doi.org/10.48550/arXiv.2309.01299

CITACION

Jie Chen, Igor Loi, Eric Flamand; Giuseppe Tagliavini; Luca Benini, Davide Rossi. Scalable Hierarchical Instruction Cache for Ultralow-Power Processors Clusters. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 31, no. 4, pp. 456-469, April 2023

LINK TO THE REPOSITORY

https://arxiv.org/abs/2309.01299

LINK TO THE PUBLICATION

https://arxiv.org/pdf/2309.01299.pdf